Driving the DSL highway : High speed, high density, low power, low cost

DSL is in deployment for a few years, but what is next? The broadband market is open for the home user, but what can we do on the silicon integration level to make it cheaper? What are the bottlenecks today to make it more power efficient and reduce the hardware size, on the central office side (CO) and the customer premises side (CPE). Which new technologies do we need to further increase performance and density of CO lines per board and reduce the power dissipation per rack? How do we tailor the DSL product to the user categories? Can we make DSL a success for a century, like the plain old telephone system (POTS)? These are all questions in the minds of telecom analog and digital ASIC and system designers. In this paper we may not give all the answers, but at least we point out the trends in silicon integration for future-safe DSL products, mainly focussing on analog front-end driver issues.