DocumentCode :
439831
Title :
A 2V low-power CMOS 125Mbaud repeater architecture for UTP5 cables
Author :
Gondi, S. ; Geiger, R. ; Jin Liu ; Bareither, J. ; Sterrantino, S. ; Pace, E.
Author_Institution :
Iowa State University, Lowa, USA
fYear :
2002
fDate :
24-26 Sept. 2002
Firstpage :
571
Lastpage :
574
Abstract :
A repeater has been developed for 125Mbaud twisted pair data communication with binary signal levels. The repeater includes an adaptive equalizer and a driver. This architecture operates from a 2V supply while consuming less than 6mA of current in the equalizer section and 12mA in the driver section. The active die area is less than 0.04mm2in a 0.21 µ digital CMOS process. For 100m UTP5 cable the jitter at the output of the repeater is less than 0.3UI peak to peak (including driver jitter).
Keywords :
Attenuation; CMOS process; Cables; Equalizers; Filters; Intersymbol interference; Jitter; Nonlinear distortion; Repeaters; Transformers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2002. ESSCIRC 2002. Proceedings of the 28th European
Conference_Location :
Florence, Italy
Type :
conf
Filename :
1471591
Link To Document :
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