Expandable high throughput vector based access memory architecture

New memory architecture with improved performance in term of expandability and throughput was developed. The architecture, primarily developed for vector access based RF-applications and demonstrated in an electronic warfare application, has potential for closely related applications like cash memories and network routers. A prototype chip with a 64-kbit four-port memory on chip and distributed control logic was designed and fabricated in a standard 0.8 µm BiCMOS process (1M transistors). The research design goal was 10 Gbit/s throughput, using 8 bit data streams and 320 MHz operation frequency. Measurements on prototype chip confirmed the design goal to 50% (5 Gbit/s).