High yield processing for fixed interconnect LSI arrays

Large scale integration (LSI) represents an exciting current development in bipolar integrated circuit technology. Through fabrication of very large logic functions of a few hundred gates on a single silicon die, it will ultimately be possible to design compact, less expensive, high-speed circuits of high reliability. However, in order to fabricate arrays of this complexity on a repeatable basis, improvements in component yields by more than an order of magnitude over conventional levels are essential, since even a single defective component will render an array inoperative.