Charge transport and storage in high-speed complementary MNOS memory transistors

There has been recent interest in the characteristics of thin-oxide, MNOS Memory Transistors for high-speed, erase/write semiconductor memories. We present a direful tunneling theory, to interpret experimental results on thin-oxide (15Å-20Å) complementary MNOS structures. The shift in device threshold voltage ΔVth is related to the physical parameters of the structure for the erase/write and storage modes of operation. The erase/write charging of the nitride-oxide interface may be written as, where C0and Cnare the oxide and nitride capacitances, respectively and VTa characteristic tunneling voltage given as, where Xois the oxide thickness φBa characteristic tunneling barrier height and the tunneling effective mass. The storage mode is interpreted in terms of the Si-SiO2interface state density characteristics. Experimental devices show a v. for a 100 nsec. ± 20v. gate voltage with a charging slope of ± 2v. per decade of time. Charge storage varies from 0.2v.- 0.4v. per decade of time after the first few minutes.