DocumentCode
439974
Title
A self-isolation scheme for monolithic integrated circuits
Author
Vora, M.B.
Volume
17
fYear
1971
fDate
1971
Firstpage
42
Lastpage
44
Abstract
A new technique for fabricating monolithic integrated circuits with active and passive components on a silicon substrate will be presented. Conventionally, integrated circuits are made by diffusing N+impurities in a P-substrate followed by an epitaxial deposition of N-type silicon. A subsequent P+diffusion around the N+buried layer defined the P-N junction-isolated N/N+(N over N+) islands where the transistors could be formed by making P base and N+emitter diffusions.
Keywords
Aerodynamics; CMOS technology; Delay; Integrated circuit technology; Laboratories; Leakage current; Monolithic integrated circuits; Power dissipation; Semiconductor films; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1971 International
Conference_Location
IEEE
Type
conf
Filename
1476706
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