Title :
A self-isolation scheme for monolithic integrated circuits
Abstract :
A new technique for fabricating monolithic integrated circuits with active and passive components on a silicon substrate will be presented. Conventionally, integrated circuits are made by diffusing N+impurities in a P-substrate followed by an epitaxial deposition of N-type silicon. A subsequent P+diffusion around the N+buried layer defined the P-N junction-isolated N/N+(N over N+) islands where the transistors could be formed by making P base and N+emitter diffusions.
Keywords :
Aerodynamics; CMOS technology; Delay; Integrated circuit technology; Laboratories; Leakage current; Monolithic integrated circuits; Power dissipation; Semiconductor films; Silicon;
Conference_Titel :
Electron Devices Meeting, 1971 International
Conference_Location :
IEEE