Pathways and pitfalls in device lithography

The device engineer, working in silicon integrated circuits, bubble memory, microwave devices and other emerging areas consistently finds that pattern generation sets major limits on his ability to achieve higher complexity, higher performance, lower cost, greater reliability and faster design turnaround time. As a consequence major efforts are being directed to pattern generation technology. The motivation for the various activities will be examined and reviewed, and an attempt will be made to assess the relevance of these activities, pointing out potential pitfalls or areas that should be considered early in the technology development.