DocumentCode
440042
Title
Charge coupled devices in digital LSI
Author
Allen, R.A.
Volume
22
fYear
1976
fDate
1976
Firstpage
21
Lastpage
26
Abstract
This paper shows how a wide range of digital functions using CCD´s may be realized. The list includes an Exclusive-OR, AND, OR, NOR gates, a half and a full-adder. Also a logic inverter that regenerates the input bit while simultaneously generating its complement is described. Arrays of Digital CCD´s are now being proposed for LSI systems such as FFT´s; and the inherent high packing density and low power delay product of CCD´s are compared with contemporary digital devices such as CMOS, NMOS, I2L and triple diffused bipolar. Experimental CCD arrays that perform multiplication and addition have been produced and a summary of the test results are presented. This work has been supported in large part by the United States Naval Research Laboratory, under contract number N00014-74-C-0068.
Keywords
Charge coupled devices; Charge-coupled image sensors; Contracts; Delay; Laboratories; Large scale integration; MOS devices; Performance evaluation; Pulse inverters; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1976 International
Conference_Location
IEEE
Type
conf
Filename
1478687
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