• DocumentCode
    440457
  • Title

    SystemCFL: a formalism for hardware/software codesign

  • Author

    Man, K.L.

  • Author_Institution
    Dept. of Math. & Comput. Sci., Eindhoven Univ. of Technol., Netherlands
  • Volume
    1
  • fYear
    2005
  • fDate
    28 Aug.-2 Sept. 2005
  • Abstract
    SystemCFL is a formal language for hardware/software codesign. Principally, SystemCFL is the formalization of SyslemC based on classical process algebra ACP. The language is aimed to give formal specification of SystemC designs and perform formal analysis of SystemC processes. This paper, designed for the first-time user of SystemCFL, guides the reader through modeling, analyzing and verifying designs using SystemCFL. This paper illustrates the use of SysternCFL with two case studies taken from literature.
  • Keywords
    formal languages; formal specification; hardware-software codesign; process algebra; SystemC design; SystemCFL; formal analysis; formal language; formal specification; hardware/software codesign; process algebra ACP; Clocks; Cost accounting; Delay effects; Encapsulation; Formal languages; Hardware; Interleaved codes; System recovery; Virtual manufacturing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuit Theory and Design, 2005. Proceedings of the 2005 European Conference on
  • Print_ISBN
    0-7803-9066-0
  • Type

    conf

  • DOI
    10.1109/ECCTD.2005.1522943
  • Filename
    1522943
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=440457