Polarity dependence of bias temperature instabilities in HfxSi1-xON/TaN gate stacks

For the first time, polarity effects on bias temperature instabilities in HfSiON/TaN gate stacks are investigated. Different device degradation mechanisms are revealed, depending on the gate bias stress polarity: positively charged defects are generated under negative bias temperature stress, while negative charge buildup, resulting from the trapping of electrons at pre-existing defects in the gate stack, is observed under positive gate bias. Negative bias temperature instabilities are found to limit the lifetime of these devices.