High performance device utilizing ultra-thick-strained-Si (UTSS) grown on relaxed SiGe

Author

Lee, Sun-Ghil ; Kim, Young-Pil ; Lee, Young-Eun ; Lee, Jong-Wook ; Jung, Insoo ; Lee, Deok-Hyung ; Son, Yong-Hoon ; Kang, Sung-Kwan ; Kang, Pilkyu ; Kang, Min-Gu ; Shin, Yu Gyun ; Chung, U-in ; Moon, Joo Tae

Author_Institution

Samsung Electron. Co., Ltd., Gyeonggi-Do, South Korea

fYear

2005

fDate

12-16 Sept. 2005

Firstpage

309

Lastpage

312

Abstract

We demonstrate a highly manufacturable substrate-induced strained Si device, which is compatible with the conventional Si bulk process. It utilizes ultra-thick-strained Si (UTSS) layer thicker than 3000 Å and relaxed SiGe layer with low Ge content less than 10%. The UTSS n-MOSFET gives 6 ∼ 12% increase in I_on according to the gate length without the cost of increase in I_off. In addition, more than 5% increase in I_on for p-MOSFET can be obtained by hybrid stress of UTSS and SiGe source/drain process. We also emphasize the importance of the ratio of channel resistance (R_CH) to source-drain resistance (R_SD) for performance enhancement.

Keywords

Ge-Si alloys; MOSFET; carrier mobility; elemental semiconductors; epitaxial growth; etching; semiconductor materials; silicon; substrates; Si-SiGe; UTSS n-MOSFET device; channel resistance; high performance device; hybrid stress; p-MOSFET device; source-drain process; source-drain resistance; ultra-thick-strained-silicon layer; Cascading style sheets; Cleaning; Costs; Fabrication; Germanium silicon alloys; MOSFET circuits; Manufacturing processes; Moon; Silicon germanium; Stress;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Device Research Conference, 2005. ESSDERC 2005. Proceedings of 35th European

Print_ISBN

0-7803-9203-5

Type

conf

DOI

10.1109/ESSDER.2005.1546647

Filename

1546647