FPGA implementation of MMSE adaptive array antenna using RLS algorithm

Author

Nakajima, Atsushi ; Kim, Minseok ; Arai, Hiroyuki

Author_Institution

Graduate Sch. of Eng., Yokohama Nat. Univ., Japan

Volume

3A

fYear

2005

fDate

3-8 July 2005

Firstpage

303

Abstract

A fixed-point RLS processor was simulated and integrated on a FPGA system. The proposed system including synchronization process and performance was confirmed from experiments in radio anechoic chamber and indoor propagation. This paper demonstrates the RLS processor integration system using modulated signals of π/4-DQPSK (π/4-differential quadrature phase shift keying). The performance of the RLS processor is verified by simulations and experiments.

Keywords

adaptive antenna arrays; differential phase shift keying; field programmable gate arrays; indoor radio; least mean squares methods; quadrature phase shift keying; radiowave propagation; recursive estimation; synchronisation; π/4-DQPSK; π/4-differential quadrature phase shift keying; FPGA implementation; MMSE; adaptive array antenna; fixed-point RLS processor; indoor propagation; modulated signals; performance; radio anechoic chamber; synchronization process; Adaptive arrays; Antenna arrays; Concurrent computing; Convergence; Correlators; Digital signal processing; Field programmable gate arrays; High performance computing; Least squares approximation; Resonance light scattering;

fLanguage

English

Publisher

ieee

Conference_Titel

Antennas and Propagation Society International Symposium, 2005 IEEE

Print_ISBN

0-7803-8883-6

Type

conf

DOI

10.1109/APS.2005.1552241

Filename

1552241