DocumentCode :
446687
Title :
Automatic generation of composite transistors based on four terminal floating ors
Author :
Garcia-Rivera, Jose A. ; Melendez, David ; Palomera-Garcia, Rogelio ; Jimenez, Manuel ; Lazaro, Antoni Manuel
Author_Institution :
Dept. of Electr. & Comput. Eng., Puerto Rico Univ., Mayaguez, Puerto Rico
Volume :
1
fYear :
2003
fDate :
27-30 Dec. 2003
Firstpage :
137
Abstract :
The or model of transistors is used to automatically generate and model composite transistors based on four terminal floating or (FTFN). The goal is to generate all the possible composite transistor configurations using or equivalences. An algorithm using C++ was developed, which is applicable to generate composite transistors a with any number of single transistors. Its usefulness is illustrated with two and all-possible two transistor configurations. A list of composite transistors was generated, including well-known ones such as the darlington pair and the cascode configurations.
Keywords :
active networks; bipolar transistors; semiconductor device models; C++ language; MOSFET; bipolar transistor; cascode configurations; composite transistors; darlington pair; four terminal floating ors; or equivalences; transistors or model; universal active element; AC generators; Admittance; Algorithm design and analysis; Bipolar transistors; Capacitance; MOSFET circuits; Operational amplifiers; Stability; Bipolar Transistor (BJT) Four Terminal Floating Nullor (FTFN); MOSFET (MOS); Nullor; Universal Active Element (UAE);
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2003 IEEE 46th Midwest Symposium on
ISSN :
1548-3746
Print_ISBN :
0-7803-8294-3
Type :
conf
DOI :
10.1109/MWSCAS.2003.1562237
Filename :
1562237
Link To Document :
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