Over 100 dBc ROM-less piecewise non-linear direct digital frequency synthesizers

Author

Beiu, Valeriu ; Betowski, David J. ; Wu, Pao-Szu

Author_Institution

Sch. of Electr. Eng. & Comput. Sci., Washington State Univ., Pullman, WA, USA

Volume

2

fYear

2003

fDate

27-30 Dec. 2003

Firstpage

760

Abstract

This paper deals with maximizing the spurious free dynamic range (SFDR), while also minimizing the power consumption of sine-wave approximation circuits used in direct digital frequency synthesizers. Three 16-segments ROM-less piecewise non-linear approximations are introduced and compared with many other ROM-less solutions. The circuit complexity (estimated as the number of transistors, is comparable to that of other 16-segment piecewise linear approximations, while the SFDR is significantly increased from 48+72 dBc to over 100 dBc.

Keywords

circuit complexity; direct digital synthesis; piecewise linear techniques; power consumption; circuit complexity; direct digital frequency synthesizers; piecewise non-linear approximations; power consumption; sine-wave approximation circuits; spurious free dynamic range; Adders; Approximation methods; Circuits; Dynamic range; Energy consumption; Frequency synthesizers; Hardware; Multiplexing; Piecewise linear approximation; Read only memory;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2003 IEEE 46th Midwest Symposium on

ISSN

1548-3746

Print_ISBN

0-7803-8294-3

Type

conf

DOI

10.1109/MWSCAS.2003.1562397

Filename

1562397