DocumentCode
446788
Title
Design and development of a demonstration platform dedicated to turbo codes
Author
Jego, Christophe
Author_Institution
Electron. Dept., GET/ENST Bretagne, Cesson Sevigne
Volume
2
fYear
2003
fDate
30-30 Dec. 2003
Firstpage
823
Abstract
SOPC, an acronym for the system on a programmable chip, is an interesting technology that enables a system to combine logic elements, memories and one or more processor cores on the same FPGA. A platform dedicated to turbo codes has been developed using this technology. Error correcting codes are one of the solutions available to improve digital communication quality. Currently the iterative process, known as turbo coding, is the most efficient channel coding technique for digital communications
Keywords
channel coding; field programmable gate arrays; system-on-chip; turbo codes; FPGA; channel coding; error correcting codes; system on a programmable chip; turbo code platform; AWGN; Application software; Digital communication; Error correction codes; Field programmable gate arrays; Hardware; Logic; Programmable circuits; System-on-a-chip; Turbo codes;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2003 IEEE 46th Midwest Symposium on
Conference_Location
Cairo
ISSN
1548-3746
Print_ISBN
0-7803-8294-3
Type
conf
DOI
10.1109/MWSCAS.2003.1562413
Filename
1562413
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