• DocumentCode
    446932
  • Title

    Impact of new transistor scaling methods on SOI SRAM cell stability

  • Author

    Burbach, G. ; Feudel, T. ; Horstmann, M. ; Greenlaw, D. ; Seltmann, R. ; Craig, M. ; Krishnan, S. ; Leary, M. ; Kepler, N. ; Raab, M.

  • Author_Institution
    Adv. Micro Devices, Dresden, Germany
  • fYear
    2005
  • fDate
    3-6 Oct. 2005
  • Firstpage
    213
  • Lastpage
    214
  • Abstract
    The size of the embedded SRAM is steadily increasing in high-end microprocessors like Athlon64™ and Opteron™. So the demand for small cell footprints and improved stability has become more challenging. We describe how AMD has recognized and addressed the competing aspects of technology scaling and improved stability in the 90nm technology.
  • Keywords
    SRAM chips; circuit stability; embedded systems; microprocessor chips; silicon-on-insulator; 90 nm; SOI SRAM cell stability; cell footprints; embedded SRAM; high-end microprocessors; transistor scaling methods; Capacitive sensors; Collaboration; Design engineering; Heating; Microprocessors; Product design; Proximity effect; Random access memory; Stability; Transistors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOI Conference, 2005. Proceedings. 2005 IEEE International
  • ISSN
    1078-621X
  • Print_ISBN
    0-7803-9212-4
  • Type

    conf

  • DOI
    10.1109/SOI.2005.1563592
  • Filename
    1563592
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=446932