• DocumentCode
    447124
  • Title

    The error analysis of sigma delta modulator

  • Author

    Lijun, Cao ; Zhimi, Yang

  • Author_Institution
    Sch. of Instrum., Hefei Univ. of Technol., China
  • Volume
    1
  • fYear
    2005
  • fDate
    12-14 Oct. 2005
  • Firstpage
    255
  • Lastpage
    258
  • Abstract
    There are some special characteristics such as high precision, low cost and easy finish the system design for sigma delta A/D converter. If omitted the complicated digital decimator, the precision and rate of A/D conversion will depend on the way of system design. In this paper, the error of first order sigma delta modulator was analyzed with dc input. Based on the periodic character of the output 1-bit data stream when input is a rational, the conclusion were given that the error will decreasing along with the increase of account pulse and the least error will occur when average calculation in a period. This is a theory warranty for engineers to design a fast, high precision A/D converter application with sigma delta modulator.
  • Keywords
    error analysis; sigma-delta modulation; digital decimator; error analysis; sigma delta A/D converter; sigma delta modulator; Costs; Delta modulation; Delta-sigma modulation; Design engineering; Encoding; Error analysis; Quantization; Sampling methods; Signal processing; Signal sampling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Communications and Information Technology, 2005. ISCIT 2005. IEEE International Symposium on
  • Print_ISBN
    0-7803-9538-7
  • Type

    conf

  • DOI
    10.1109/ISCIT.2005.1566844
  • Filename
    1566844