DocumentCode
450377
Title
A New Test Pattern Generation System
Author
El-Ziq
Author_Institution
Honeywell, Inc., Bloomington, Minnesota
fYear
1980
fDate
23-25 June 1980
Firstpage
62
Lastpage
68
Abstract
This paper discusses the main shortcomings of existing software test pattern generation systems and describes the development of a new system. The new system will be developed in two phases. The first phase is called the scan-in/scan-out test generation sub-system. This sub-system will be used for testing designs which have 100% scan-in/scan-out (reading or writing of every register from external world is possible). The second phase will include the development of efficient general functional models. The test generation system to be developed in the first phase will be updated to incorporate the capability of handling such models. The functional models include general-combinational, register, counter ROM, RAM, and microprocessor. In this paper, only, an outline of some of the distinct features of the system will be described.
Keywords
Automatic test pattern generation; Automatic testing; Circuit faults; Circuit simulation; Circuit testing; Counting circuits; Logic testing; Permission; System testing; Test pattern generators;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1980. 17th Conference on
Print_ISBN
0-89791-020-6
Type
conf
DOI
10.1109/DAC.1980.1585230
Filename
1585230
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