Title :
A United Approach to Simulation and Timing Verification at the Functional Level
Author :
Mokkarala, Vighneswara Row ; Fan, Antony ; Apte, Ravi
Author_Institution :
Hewlett Packard Co., Cupertino, CA
Keywords :
Analytical models; Computational modeling; Delay; Design automation; Logic circuits; Logic design; Logic gates; Switches; Switching circuits; Timing;
Conference_Titel :
Design Automation, 1985. 22nd Conference on
Print_ISBN :
0-8186-0635-5
DOI :
10.1109/DAC.1985.1586030
