• DocumentCode
    450466
  • Title

    Transistor Sizing in CMOS Circuits

  • Author

    Cirit, Mehmet A.

  • Author_Institution
    Silicon Design Labs, Liberty Corner, NJ
  • fYear
    1987
  • fDate
    28-1 June 1987
  • Firstpage
    121
  • Lastpage
    124
  • Abstract
    The problem of optimally sizing transistors in a VLSI CMOS circuit is considered. Models and algorithms for performing optimization on a single path using RC-tree approximation are presented. The results of an automatic optimization procedure are discussed.
  • Keywords
    Capacitance; Circuits; Delay; Design optimization; Optimization methods; Permission; Semiconductor device modeling; Silicon; Transistors; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation, 1987. 24th Conference on
  • ISSN
    0738-100X
  • Print_ISBN
    0-8186-0781-5
  • Type

    conf

  • DOI
    10.1109/DAC.1987.203231
  • Filename
    1586215
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=450466