DocumentCode
450468
Title
Reflections of High Speed Signals Analyzed as a Delay in Timing for Clocked Logic
Author
Canright, Robert E., Jr. ; Helland, Arden R.
Author_Institution
Martin Marietta Orlando Aerospace, Orlando, FL
fYear
1987
fDate
28-1 June 1987
Firstpage
133
Lastpage
139
Abstract
This paper develops equations that can extend the performance of high speed digital systems. The equations allow the application of timing analysis to the selection of the minimum series terminating resistor. Use of the minimum terminating resistor minimizes power dissipation and maximizes the drive capability of the terminated device. Detailed examples simplify the adaptation of these new design procedures to computer-aided design (CAD).
Keywords
Clocks; Delay; Design automation; Digital systems; Equations; Logic devices; Reflection; Resistors; Signal analysis; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1987. 24th Conference on
ISSN
0738-100X
Print_ISBN
0-8186-0781-5
Type
conf
DOI
10.1109/DAC.1987.203233
Filename
1586217
Link To Document