An Automated Design of Minimum-Area IC Power/Ground Nets

Given tree topologies for routing power/ground (p/g) nets in integrated circuits, this paper formulates and solves the problem of determining the widths of the branches of the trees. Constraints are developed in order to maintain proper logic levels and switching speed, to prevent electromigration, and to satisfy certain design rule and regularity requirements. The area required by the p/g distribution system is minimized subject to these constraints. Some case studies are also presented.