• DocumentCode
    450489
  • Title

    Application of Term Rewriting Techniques to Hardware Design Verification

  • Author

    Chandrasekhar, Mandalagiri S. ; Privitera, John P. ; Conradt, Kenneth W.

  • Author_Institution
    Hewlett-Packard Company Design Technology Laboratory, Palo Alto, CA
  • fYear
    1987
  • fDate
    28-1 June 1987
  • Firstpage
    277
  • Lastpage
    282
  • Abstract
    Term rewriting systems have been used in automatic theorem proving. A canonical term rewriting system for boolean algebra recently discovered, and a refutation technique using Knuth-Bendix completion procedure can be used to prove boolean formulas arising in logic verification. In this paper a design verification system based on term rewriting techniques is presented. It can prove total correctness of combinational circuits without exhaustive simulation. A prototype system implemented on a Motorola 68010 based workstation shows that the system performs favorably compared to a simulator.
  • Keywords
    Boolean algebra; Circuit simulation; Circuit testing; Equations; Hardware; Laboratories; Logic circuits; Logic functions; Logic testing; Permission;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation, 1987. 24th Conference on
  • ISSN
    0738-100X
  • Print_ISBN
    0-8186-0781-5
  • Type

    conf

  • DOI
    10.1109/DAC.1987.203255
  • Filename
    1586239