DocumentCode
450577
Title
VLSI Design Language Standardization Effort in Japan
Author
Karatsu, Osamu
Author_Institution
Nippon Telegraph and Telephone Corporation, Tokyo, Japan
fYear
1989
fDate
25-29 June 1989
Firstpage
50
Lastpage
55
Abstract
This paper presents a new standard for a hardware design language (UDL/I: Unified Design Language for Integrated Circuit) that is being developed in Japan for application to logic synthesis technology. The features of UDL/I are as follows. It (1) is a logic synthesis oriented design language, (2) provides a formal and strict semantic definitions, (3) supports high-level constructs for easy hardware description, and (4) supports quick and error free design.
Keywords
Application specific integrated circuits; Hardware design languages; Integrated circuit synthesis; Large scale integration; Logic design; Permission; Standardization; Standards development; Telegraphy; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1989. 26th Conference on
ISSN
0738-100X
Print_ISBN
0-89791-310-8
Type
conf
DOI
10.1109/DAC.1989.203369
Filename
1586353
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