Title :
GRASP: A Grammar-based Schematic Parser
Author :
Bamji, Cyrus ; Allen, Jonathan
Author_Institution :
Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge
Abstract :
The process of verifying that a circuit´s schematic netlist obeys a particular design methodology is formalized. Circuit correctness is tied to a rigorous set of context free grammar composition rules. These rules define how a small set of module symbols may be combined for circuits adhering to the design methodology. Schematic netlists are represented as graphs, and composition rules are defined as graph transformations akin to grammatical productions. Starting with a circuit netlist, a hierarchical parse tree that can demonstrate the wellformedness of the circuit is constructed. The procedure is hierarchical, incremental, and fast. GRASP operates one to two orders of magnitude faster than previous approaches.
Keywords :
CMOS logic circuits; Circuit synthesis; Computer errors; Design methodology; Humans; Logic design; MOS devices; Permission; Production; Tree graphs;
Conference_Titel :
Design Automation, 1989. 26th Conference on
Print_ISBN :
0-89791-310-8
DOI :
10.1109/DAC.1989.203439