Title :
MULTES/IS: An Effective and Reliable Test Generation System for Partial Scan and Non-Scan Synchronous Circuits
Author :
Ogihara, Takuji ; Muroi, Katsunobu ; Yonemori, Genichi ; Murai, Shinichi
Author_Institution :
ASIC Design Engineering Center, Mitsubishi Electric Corporation, Kanagawa, JAPAN
Abstract :
This paper describes an automatic test generation system which effectively generates test vectors by recognizing the circuit blocks for which vectors are automatically generated and the circuit blocks for which vectors have to be manually prepared. Test vectors for full scan, partial scan and non-scan synchronous circuit blocks are automatically generated. Test vectors for asynchronous circuit blocks have to be manually prepared.
Keywords :
Automatic testing; Circuit faults; Circuit testing; Electrical fault detection; Fault detection; Logic testing; Permission; Registers; Synchronous generators; System testing;
Conference_Titel :
Design Automation, 1989. 26th Conference on
Print_ISBN :
0-89791-310-8
DOI :
10.1109/DAC.1989.203451
