DocumentCode
450658
Title
ACE: A Hierarchical Graphical Interface for Architectural Synthesis
Author
Buset, O.A. ; Elmasry, M.I.
Author_Institution
VLSI Group, Electrical Engineering Department, University of Waterloo, Waterloo, Ontario, CANADA
fYear
1989
fDate
25-29 June 1989
Firstpage
537
Lastpage
542
Abstract
Existing interfaces for high-level synthesis dictate that the synthesis process be iterative rather than interactive. This paper presents an interface tool for architectural synthesis that introduces real-time interaction to high-level synthesis interfaces. ACE makes innovations in the dynamic display of synthesizer transformations and introduces new concepts in input algorithm specification.
Keywords
Design automation; Displays; Distributed computing; Graphics; High level synthesis; Machinery; Permission; Process design; Synthesizers; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1989. 26th Conference on
ISSN
0738-100X
Print_ISBN
0-89791-310-8
Type
conf
DOI
10.1109/DAC.1989.203454
Filename
1586438
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