Title :
Efficient Final Placement Based on Nets-as-points
Author :
Zhang, Xueqing ; Pillage, Lawrence T. ; Rohrer, Ronald A.
Author_Institution :
Department of Electrical Computer Engineering, Carnegie Mellon University, Pittsburgh, PA
Abstract :
Deterministic optimization programs are coming to be considered as viable alternatives for the placement of very large sea-of-gate, gate array and standard cell designs. A nets-as-points placement program has been described which provides competitive results in comparison with non-deterministic placement, and at a fraction of the run time. A new pseudo Steiner tree model for the gate placement about the net-points, along with a virtual channel snap-to-grid procedure, provides results superior to the original nets-as-points placement program without requiring iterative improvement.
Keywords :
Application specific integrated circuits; Central Processing Unit; Circuit simulation; Circuit synthesis; Design engineering; Design optimization; Integrated circuit modeling; Iterative methods; Permission; Simulated annealing;
Conference_Titel :
Design Automation, 1989. 26th Conference on
Print_ISBN :
0-89791-310-8
DOI :
10.1109/DAC.1989.203461