Efficient Algorithms for Extracting the K Most Critical Paths in Timing Analysis

Author

Yen, Steve H C ; Du, David H C ; Ghanta, S.

Author_Institution

Department of Computer Science, University of Minnesota, Minneapolis, MN

fYear

1989

fDate

25-29 June 1989

Firstpage

649

Lastpage

654

Abstract

Path extracting algorithms are a very important part of timing analysis approach. In this paper we designed and developed several algorithms which can generate the K most critical paths in a non-increasing order of their delays. The effectiveness of these algorithms is shown by some experimental results.

Keywords

Graph Theory; Logic Simulation; Path Enumeration; Timing Analysis; Timing Verification; VLSI circuit; Algorithm design and analysis; Analytical models; Circuit simulation; Computational modeling; Computer science; Delay; Independent component analysis; Logic circuits; Timing; Very large scale integration; Graph Theory; Logic Simulation; Path Enumeration; Timing Analysis; Timing Verification; VLSI circuit;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation, 1989. 26th Conference on

ISSN

0738-100X

Print_ISBN

0-89791-310-8

Type

conf

DOI

10.1109/DAC.1989.203479

Filename

1586463

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=450680