DocumentCode :
450715
Title :
Via Minimization by Layout Modification
Author :
The, Khe-Sing ; Wong, D.F. ; Cong, Jingsheng
Author_Institution :
Dept. of Computer Sciences University of Texas at Austin, Austin, TX
fYear :
1989
fDate :
25-29 June 1989
Firstpage :
799
Lastpage :
802
Abstract :
We present in this paper a new approach to the two-layer via minimization problem. Our approach is to systematically eliminate vias by modifying the routing layout. We have implemented our algorithm and applied it to benchmark routing layouts published in the literature, and obtained significant reduction in the number of vias without increasing the routing area. The experimental results show that our algorithm is more effective in via reduction and more efficient in running time compared to conventional via minimization algorithms. In particular, for Burstein´s 19 track solution to Deutsch´s difficult problem, our algorithm obtains 34% reduction in the number of vias, which is more than 11% improvement over the conventional CVM (constrained via minimization) approach. The application of our algorithm to various solutions to the Deutsch´s difficult problem produces the fewest numbers of vias ever reported in the literature.
Keywords :
Computer science; Contacts; Costs; Integrated circuit interconnections; Manufacturing; Minimization methods; Permission; Routing; Topology; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1989. 26th Conference on
ISSN :
0738-100X
Print_ISBN :
0-89791-310-8
Type :
conf
DOI :
10.1109/DAC.1989.203514
Filename :
1586498
Link To Document :
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