Panel: Logic Emulation: A Niche or a Future Standard for Design Verification?

Logic Emulations systems consist of boards of re-programmable Field-Programmable Gate Arrays (FPGAs) programmable interconnect, and large software synthesis and analysis packages. They allow ASIC and system-level designs to be represented in hardware that performs at a significant fraction of the real device speeds. They can be used in the end-product for system-level debugging and analysis. As a result, they present an opportunity to perform faster and more accurate design verification. This panel will focus on the role of logic emulation in design verification and will consider the following questions: - Do the benefits of time-to-market and better end product quality justify the investment in logic emulation? - How do logic emulation systems compare with other quick prototyping methods, such as: 1)Build-your-own FPGA prototype on a printed-circuit board, and 2)Build-your-own FPGA prototype using Field-Programmable Interconnect Chips/Device - How does logic emulation compare with traditional simulation in speed, capacity and convenience, including the newer compiled-code simulators? - What is the relationship with special-purpose hardware simulation accelerators? - Will logic emulation be used to verify designs at architectural level? - Does logic emulation only apply to certain types of applications? - Will the emulation speed become a critical barrier to market acceptance? - What will be the effect of declining emulation cost? - What role does logic emulation play in software/hardware co-design?