Title :
Optimal Clustering for Delay Minimization
Author :
Rajaraman, Rajmohan ; Wong, D.F.
Author_Institution :
Department of Computer Sciences, University of Texas at Austin, Austin, TX
Abstract :
This paper addresses the problem of circuit clustering for delay minimization, subject to capacity constraints. We use the general delay model, for which only heuristic solutions were known. We present an optimal polynomial time algorithm for combinational circuits under this model. Our algorithm can be generalized to solve the problem under any monotone clustering constraint.
Keywords :
Bridge circuits; Clustering algorithms; Combinational circuits; Delay effects; Integrated circuit interconnections; Joining processes; Minimization; Partitioning algorithms; Polynomials; Timing;
Conference_Titel :
Design Automation, 1993. 30th Conference on
Print_ISBN :
0-89791-577-1
DOI :
10.1109/DAC.1993.203966