High-Level Transformations for Minimizing Syntactic Variances

Most synthesis systems generate designs from hardware descriptions by relating each language construct to a particular hardware structure. Thus, designs obtained from these systems are dependent on description styles. In other words, semantically equivalent descriptions with different orderings or groupings of conditional and assignment statements could generate designs with distinctively different costs and performance. This paper introduces an approach for minimizing the syntactic variance of different description styles. Experimental data on several examples shows the effectiveness of the proposed approach.