DocumentCode :
451928
Title :
Bridge Fault Simulation Strategies for CMOS Integrated Circuits
Author :
Chess, Brian ; Larrabee, Tracy
Author_Institution :
Computer Engineering Board of Studies, University of California, Santa Cruz
fYear :
1993
fDate :
14-18 June 1993
Firstpage :
458
Lastpage :
462
Abstract :
After introducing the Primitive Bridge Function, a characteristic function describing the behavior of bridged components, we present a theorem for detecting feedback bridge faults. We discuss two different methods of bridge fault simulation, one of which is new, and present experimental results relating the relative efficiency of the two methods. We conclude that the new simulation method, Wire Memory bridge fault simulation, is more efficient--especially for larger circuits.
Keywords :
Bridge circuits; CMOS integrated circuits; CMOS technology; Circuit faults; Circuit simulation; Circuit testing; Electrical fault detection; Fault detection; Switches; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1993. 30th Conference on
ISSN :
0738-100X
Print_ISBN :
0-89791-577-1
Type :
conf
DOI :
10.1109/DAC.1993.203992
Filename :
1600265
Link To Document :
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