DocumentCode :
451983
Title :
A Methodology for Efficient Estimation of Switching Activity in Sequential Logic Circuits
Author :
Teiro, JoséMon ; Devadas, Srinivas ; Lin, Bill
Author_Institution :
Department of EECS, MIT, Cambridge
fYear :
1994
fDate :
6-10 June 1994
Firstpage :
12
Lastpage :
17
Abstract :
We describe a computationally efficient scheme to approximate average switching activity in sequential circuits which requires the solution of a non-linear system of equations of size N, where the variables correspond to state line probabilities. We show that the approximation method is within 3% of the exact Chapman-Kolmogorov method, but is orders of magnitude faster for large circuits. Previous sequential switching activity estimation methods can have significantly greater inaccuracies.
Keywords :
Bridge circuits; CMOS logic circuits; Clocks; Combinational circuits; Equations; Power dissipation; Semiconductor device modeling; Sequential circuits; State estimation; Switching circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1994. 31st Conference on
ISSN :
0738-100X
Print_ISBN :
0-89791-653-0
Type :
conf
DOI :
10.1109/DAC.1994.204065
Filename :
1600338
Link To Document :
بازگشت