• DocumentCode
    451987
  • Title

    Stochastic Optimization Approach to Transistor Sizing for CMOS VLSI Circuits

  • Author

    Mehrotra, Sharad ; Franzon, Paul ; Liu, W. Entai

  • Author_Institution
    Department of Electrical and Computer Engineering, North Carolina State University, Raleigh, NC
  • fYear
    1994
  • fDate
    6-10 June 1994
  • Firstpage
    36
  • Lastpage
    40
  • Abstract
    A stochastic global optimization approach is presented for transistor sizing in CMOS VLSI circuits. This is a direct search strategy for the best design among feasible ones, with the designer determining when the search is stopped. Through examples, we show the power of this technique in quickly obtaining very good designs, for skew minimization problems.
  • Keywords
    Circuits; Design automation; Design optimization; Distributed computing; Machinery; Permission; Stochastic processes; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation, 1994. 31st Conference on
  • ISSN
    0738-100X
  • Print_ISBN
    0-89791-653-0
  • Type

    conf

  • DOI
    10.1109/DAC.1994.204069
  • Filename
    1600342
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=451987