DocumentCode
452015
Title
Rectification of Multiple Logic Design Errors in Multiple Output Circuits
Author
Tomita, Masahiro ; Yamamoto, Tamotsu ; Sumikawa, Fuminori ; Hirano, Kotaro
Author_Institution
The Graduate School of Science and Technology, Kobe University, Kobe, JAPAN
fYear
1994
fDate
6-10 June 1994
Firstpage
212
Lastpage
217
Abstract
This paper presents the EXMalgorithm, which locates multiple logic design errors in a combinational circuit with multiple output. An error possibility index and a six-valued simulation method have been introduced to reduce the number of error candidates without missing real errors. Experimental results have shown that this algorithm locates all errors at high hit ratio for benchmark circuits.
Keywords
Automatic logic units; Circuit simulation; Circuit synthesis; Combinational circuits; Computer errors; Design automation; Design engineering; Error correction; Logic design; Permission;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1994. 31st Conference on
ISSN
0738-100X
Print_ISBN
0-89791-653-0
Type
conf
DOI
10.1109/DAC.1994.204101
Filename
1600374
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