DocumentCode :
452067
Title :
Path Hashing to Accelerate Delay Fault Simulation
Author :
Henftling, Manfred ; Wittmann, Hannes C. ; Antreich, Kurt J.
Author_Institution :
Institute of Electronic Design Automation, Department of Electrical Engineering, Technical University of Munich, Munich, Germany
fYear :
1994
fDate :
6-10 June 1994
Firstpage :
522
Lastpage :
526
Abstract :
This paper presents an efficientapproach to path delay fault simulation. We accelerate fault simulation by more than one order of magnitude with a new speed up technique called path hashing. An intelligent path identification method allows to deal with circuits containing two orders of magnitude more paths than state-of-the-art tools. Using these techniques larger circuits can be handled with a reasonable amount of time and memory.
Keywords :
Acceleration; Circuit faults; Circuit simulation; Circuit testing; Combinational circuits; Delay; Fault detection; Logic; Manufacturing processes; Semiconductor device modeling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1994. 31st Conference on
ISSN :
0738-100X
Print_ISBN :
0-89791-653-0
Type :
conf
DOI :
10.1109/DAC.1994.204158
Filename :
1600431
Link To Document :
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