• DocumentCode
    453624
  • Title

    Fast algorithm for leakage power reduction by input vector control

  • Author

    Chang, Xiaotao ; Fan, Dongrui ; Han, Yinhe ; Zhang, Zhimin ; Li, Xiaowei

  • Author_Institution
    Inst. of Comput. Technol., Chinese Acad. of Sci., Beijing, China
  • Volume
    1
  • fYear
    2005
  • fDate
    24-27 Oct. 2005
  • Firstpage
    14
  • Lastpage
    18
  • Abstract
    With leakage power being no longer negligible, it becomes a critical problem for low power design. Input vector control is an effective method to reduce leakage power when a circuit enters sleep mode. It seeks to find a vector that minimizes leakage power to be statically applied to the primary inputs of a circuit. In this paper, we present a fast algorithm to search the input vector which can lead to the minimal leakage power. In order to accelerate the evaluation procedure, the circuit under simulation is reduced by circuit partition based on the level number of circuits first. Then, a searching algorithm based on sub-circuit is used to find the target input vector. Experimental results on combinational circuits of ISCAS85 benchmark show this algorithm can accelerate calculation over 5 times.
  • Keywords
    circuit simulation; combinational circuits; leakage currents; logic partitioning; circuit partition; circuit simulation; combinational circuits; gate-level simulator; input vector control; leakage power reduction; low power design; searching algorithm; Acceleration; Circuit simulation; Combinational circuits; Dynamic voltage scaling; Leakage current; Partitioning algorithms; Power dissipation; Registers; Stacking; Threshold voltage; gate-level simulator; input vector control; leakage power; low power design;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC, 2005. ASICON 2005. 6th International Conference On
  • Print_ISBN
    0-7803-9210-8
  • Type

    conf

  • DOI
    10.1109/ICASIC.2005.1611259
  • Filename
    1611259