Low power set-associative cache with single-cycle partial tag comparison

Author

Chen, Jian ; Peng, Ruihua ; Fu, Yuzhuo

Author_Institution

Sch. of Micro-Electron., Shanghai Jiao Tong Univ.

Volume

1

fYear

2005

fDate

24-0 Oct. 2005

Firstpage

73

Lastpage

77

Abstract

This paper presents a novel structure for partial tag comparison cache. By triggering partial comparison unit and data sub-banks with inversed clock, the partial comparison can be activated before cache access, leading to single-cycle hit time. Meanwhile, it consumes less energy in each cache access than that of conventional cache by filtering out unnecessary tag and data array accesses. Simulation results show the proposed cache achieves an average reduction on power consumption of 24.8% compared with predictive cache

Keywords

cache storage; clocks; content-addressable storage; low-power electronics; cache access; data array access; data sub-banks; inversed clock; low power set-associative cache; partial tag comparison cache; predictive cache; single-cycle partial tag comparison; Application specific integrated circuits; Clocks; Delay; Energy consumption; Filtering; Microprocessors; Modems; Phased arrays; Predictive models; Technical Activities Guide -TAG;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC, 2005. ASICON 2005. 6th International Conference On

Conference_Location

Shanghai

Print_ISBN

0-7803-9210-8

Type

conf

DOI

10.1109/ICASIC.2005.1611271

Filename

1611271