DocumentCode
454328
Title
Exploiting TLM and Object Introspection for System-Level Simulation
Author
Beltrame, G. ; Sciuto, D. ; Silvano, C. ; Lyonnard, D. ; Pilkington, C.
Author_Institution
Politecnico di Milano
Volume
1
fYear
2006
fDate
6-10 March 2006
Firstpage
1
Lastpage
6
Abstract
The introduction of transaction level modeling (TLM) allows a system designer to model a complete application, composed of hardware and software parts, at several levels of abstraction. The simulation speed of TLM is orders of magnitude faster than traditional RTL simulation; nevertheless, it can become a limiting factor when considering a multi-processor system-on-chip (MP-SoC), as the analysis of these systems can be very complex. The main goal of this paper is to introduce a novel way of exploiting TLM features to increase simulation efficiency of complex systems by switching TLM models at runtime. Results show that simulation performance can be increased significantly without sacrificing the accuracy of critical application kernels
Keywords
circuit simulation; integrated circuit modelling; multiprocessing systems; system-on-chip; multi-processor system-on-chip; object introspection; system-level simulation; transaction level modeling; Analytical models; Application software; Communication channels; Communication switching; Design optimization; Hardware; Kernel; Runtime; Software engineering; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe, 2006. DATE '06. Proceedings
Conference_Location
Munich
Print_ISBN
3-9810801-1-4
Type
conf
DOI
10.1109/DATE.2006.244004
Filename
1656858
Link To Document