Title :
A dynamically reconfigurable packet-switched network-on-chip
Author :
Pionteck, Thilo ; Albrecht, Carsten ; Koch, Roman
Author_Institution :
Inst. of Comput. Eng., Lubeck Univ.
Abstract :
This paper presents the design of an adaptable NoC for FPGA based dynamically reconfigurable SoCs. At runtime, switches can be added or removed from the network, allowing to adapt the NoC to the number, size and location of currently configured hardware modules. By using dynamic routing tables, reconfiguration can be done without stopping or stalling the NoC. The proposed architecture avoids the limitations of bus-based interconnection schemes which are often applied in partially dynamically reconfigurable FPGA designs
Keywords :
field programmable gate arrays; integrated circuit design; logic design; microprocessor chips; network routing; network-on-chip; packet switching; FPGA designs; NoC design; dynamic routing tables; dynamically reconfigurable SoC; dynamically reconfigurable packet-switching; hardware modules; network-on-chip design; Communication switching; Design engineering; Field programmable gate arrays; Hardware; Network-on-a-chip; Packet switching; Routing; Runtime; Switches; Wire;
Conference_Titel :
Design, Automation and Test in Europe, 2006. DATE '06. Proceedings
Conference_Location :
Munich
Print_ISBN :
3-9810801-1-4
DOI :
10.1109/DATE.2006.244035
