DocumentCode
454374
Title
Software-Based Self-Test of Processors under Power Constraints
Author
Zhou, Jun ; Wunderlich, Hans-Joachim
Author_Institution
Inst. of Comput. Archit. & Comput. Eng., Stuttgart Univ.
Volume
1
fYear
2006
fDate
6-10 March 2006
Firstpage
1
Lastpage
6
Abstract
Software-based self-test (SBST) of processors offers many benefits, such as dispense with expensive test equipments, test execution during maintenance and in the field or initialization tests for the whole system. In this paper, for the first time a structural SBST methodology is proposed which optimizes energy, average power consumption, test length and fault coverage at the same time
Keywords
automatic test software; built-in self test; logic testing; microprocessor chips; field tests; initialization tests; power constraints; processor test; software-based self-test; test equipments; test execution; test program generation; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Design for testability; Energy consumption; Power generation; Software testing; System testing; Test equipment; Test program generation; low power test; processor test;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe, 2006. DATE '06. Proceedings
Conference_Location
Munich
Print_ISBN
3-9810801-1-4
Type
conf
DOI
10.1109/DATE.2006.243798
Filename
1656919
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