DocumentCode
454475
Title
Building a Better Boolean Matcher and Symmetry Detector
Author
Chai, Donald ; Kuehlmann, Andreas
Author_Institution
California Univ., Berkeley, CA
Volume
1
fYear
2006
fDate
6-10 March 2006
Firstpage
1
Lastpage
6
Abstract
Boolean matching is a powerful technique that has been used in technology mapping to overcome the limitations of structural pattern matching. The current basis for performing Boolean matching is the computation of a canonical form to represent functions that are equivalent under negation and permutation of inputs and outputs. In this paper, we first present a detailed analysis of previous techniques for Boolean matching. We then describe a novel combination of existing methods and new ideas that results in a matcher which is dramatically faster than previous work. We point out that the presented algorithm is equally relevant for detecting generalized functional symmetries, which has broad applications in logic optimization and verification
Keywords
Boolean functions; pattern matching; Boolean matcher; Boolean matching technique; generalized functional symmetries; logic optimization; logic verification; structural pattern matching; symmetry detector; technology mapping; Algorithm design and analysis; Buildings; Cost function; Detectors; Inverters; Logic; Pattern matching; Runtime library; Signal synthesis; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe, 2006. DATE '06. Proceedings
Conference_Location
Munich
Print_ISBN
3-9810801-1-4
Type
conf
DOI
10.1109/DATE.2006.243959
Filename
1657052
Link To Document