• DocumentCode
    45550
  • Title

    Advanced hexagonal layout design for split-gate reduced surface field stepped oxide U-groove metal–oxide–semiconductor field-effect transistor

  • Author

    Wang Ying ; Hu Hai-Fan ; Yu Cheng-Hao ; Wei Jia-Tong

  • Author_Institution
    Coll. of Inf. & Commun. Eng., Harbin Eng. Univ., Harbin, China
  • Volume
    8
  • Issue
    5
  • fYear
    2015
  • fDate
    5 2015
  • Firstpage
    678
  • Lastpage
    684
  • Abstract
    Split-gate reduced surface field (RESURF) stepped oxide (SGRSO) device with advanced hexagonal p-pillar (AHP) layout is investigated using three-dimensional simulations. The AHP layout can improve the on-state characteristics while not increasing the process difficulty. The p-pillar under the source electrode enhances the RESURF effect to the n-drift region, so that the n-drift region doping concentration could be substantially increased and the breakdown voltage is not reduced. Based on the SGRSO device, the AHP layout modifies the electric field distribution in the n-drift region, and reduces the RSP as compared with the common hexagonal and mesa strip layout structures. The figure of merit of the AHP layout improves by 49.8% as compared with the other two types of layouts, and the AHP has superior characteristics within a wider ND range.
  • Keywords
    MOSFET; semiconductor device breakdown; semiconductor device models; semiconductor doping; Split-gate reduced surface field stepped oxide device; advanced hexagonal layout design; advanced hexagonal p-pillar layout; breakdown voltage; doping concentration; electric field distribution; n-drift region; on-state characteristics; stepped oxide U-groove metal-oxide-semiconductor field-effect transistor; three-dimensional simulations;
  • fLanguage
    English
  • Journal_Title
    Power Electronics, IET
  • Publisher
    iet
  • ISSN
    1755-4535
  • Type

    jour

  • DOI
    10.1049/iet-pel.2013.0975
  • Filename
    7095702