DocumentCode
456735
Title
An Implementation of the Neuro-fuzzy Inference Circuit
Author
Fujimoto, Kuniaki ; Sasaki, Hirofumi ; Masaoka, Yoichiro ; Yang, Ren-Qi ; Mizumoto, Masaharu
Author_Institution
Dept. of Electr. & Electron. Syst., Kyushu Tokai Univ., Kumamoto
Volume
2
fYear
2006
fDate
Aug. 30 2006-Sept. 1 2006
Firstpage
301
Lastpage
304
Abstract
In this paper, we propose a neuro-fuzzy inference circuit suitable for real-time learning application. We could confirm through our experimental use of the FPGA that the circuit can realize a high speed tuning of inference rules first by doing the parallel processing of the operations and then by fixing the membership functions of the antecedent part
Keywords
circuit tuning; fuzzy neural nets; fuzzy reasoning; learning (artificial intelligence); neural chips; FPGA; high speed tuning; inference rules; membership functions; neuro-fuzzy inference circuit; parallel processing; real-time learning application; Circuit optimization; Field programmable gate arrays; Financial management; Fuzzy logic; Fuzzy reasoning; Fuzzy systems; Industrial control; Inference algorithms; Neural networks; Parallel processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Innovative Computing, Information and Control, 2006. ICICIC '06. First International Conference on
Conference_Location
Beijing
Print_ISBN
0-7695-2616-0
Type
conf
DOI
10.1109/ICICIC.2006.232
Filename
1691986
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