An Optimum Design for Integrated Switched-Capacitor Dickson Charge Pump Multipliers With Area Power Balance

This letter expands upon an optimum design of integrated switched-capacitor Dickson charge pump multipliers for minimizing the power, which considers the parasitic capacitance of both the top and bottom plates of pump capacitors. This letter also discusses an optimum design with area power balance, and suggests that the number of stages should be ε N_MIN, where ε is 1.5-1.7 and N_MIN is the minimum number of stages required to meet the condition that the output current is zero at a given output voltage.