DocumentCode
460433
Title
A Prototyping IP Hardware for SOPC with Single Instruction Driving
Author
Limin, Liu
Author_Institution
Inst. of Embedded Syst., Huzhou Univ.
Volume
1
fYear
2006
fDate
38869
Firstpage
559
Lastpage
562
Abstract
Embedded systems are most popular applications in computer engineering. SOPC, system on a programmable chip, is a hot point of research and development for embedded systems. A SOPC is to integrates microprocessor and IP cores into one chip. The IP cores can be built for various functions. In order to take better efficiency and performance, an operation had better to be driven by some single instruction in a SOPC. This paper is focused on some customized hardware design technology for SOPC IP cores based on FPGA. An approach of IP design for a reconfigurable SOPC is discussed. As an example, the design is described for an external RAM controller with single instruction driving. Since the SOPC is reconfigurable, a read/write instruction for external RAM is easy to add into instruction rule set of the SOPC microprocessor. Results of simulation and test show that the design is successful
Keywords
embedded systems; field programmable gate arrays; industrial property; instruction sets; microprocessor chips; system-on-chip; FPGA; SOPC IP cores; computer engineering; embedded system; field programmable gate array; hardware design technology; instruction rule set; intellectual property; microprocessor; research-development; single instruction driving; system-on-a-programmable-chip; Application software; Computer applications; Design engineering; Embedded computing; Embedded system; Hardware; Microprocessors; Prototypes; Read-write memory; Research and development;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications, Circuits and Systems Proceedings, 2006 International Conference on
Conference_Location
Guilin
Print_ISBN
0-7803-9584-0
Electronic_ISBN
0-7803-9585-9
Type
conf
DOI
10.1109/ICCCAS.2006.284698
Filename
4063942
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