DocumentCode
460902
Title
Conflict analysis in multiprocess synthesis for optimized system integration
Author
Rosenstiel, Wolfgang ; Siebenborn, Axel ; Bringmann, Oliver
Author_Institution
Universit¿t T¿bingen, T¿bingen, Germany
fYear
2005
fDate
Sept. 2005
Firstpage
15
Lastpage
20
Abstract
This paper presents a novel approach for multiprocess synthesis supporting well-tailored module integration at system level. The goal is to extend the local scope of existing architectural synthesis approaches in order to apply global optimization techniques across process bounds for shared system resources (e.g. memories, busses, global ALUs) during scheduling and binding. This allows an area efficient implementation of un-timed or cycle-fixed multiprocess specifications at RT or algorithmic level of abstraction. Furthermore, this approach supports environment-oriented synthesis for optimized module integration by scheduling accesses to global resources with respect to the access schedules of other modules communicating to the same global resources. As a result, dynamic access conflicts can be avoided by construction, and hence, there is no need for dynamic arbitration of bus and memory accesses with potentially unpredictable timing behavior.
Keywords
Algorithm design and analysis; Concurrent computing; Design engineering; Design optimization; Microelectronics; Permission; Scheduling algorithm; System analysis and design; System recovery; Timing; behavioral synthesis; binding; concurrent systems; scheduling; system level design; systems-on-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Hardware/Software Codesign and System Synthesis, 2005. CODES+ISSS '05. Third IEEE/ACM/IFIP International Conference on
Conference_Location
Jersey City, NJ, USA
Print_ISBN
1-59593-161-9
Type
conf
DOI
10.1145/1084834.1084844
Filename
4076306
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