DocumentCode
460930
Title
Enhancing security through hardware-assisted run-time validation of program data properties
Author
Raghunathan, Anand ; Jha, Niraj K. ; Ravi, Srivaths ; Arora, Divya
Author_Institution
NEC Laboratories America, Princeton, NJ
fYear
2005
fDate
Sept. 2005
Firstpage
190
Lastpage
195
Abstract
The growing number of information security breaches in electronic and computing systems calls for new design paradigms that consider security as a primary design objective. This is particularly relevant in the embedded domain, where the security solution should be customized to the needs of the target system, while considering other design objectives such as cost, performance, and power. Due to the increasing complexity and shrinking design cycles of embedded software, most embedded systems present a host of software vulnerabilities that can be exploited by security attacks. Many attacks are initiated by causing a violation in the properties of data ( e.g., integrity, privacy, access control rules, etc.) associated with a "trusted" program that is executing on the system, leading to a range of undesirable effects.In this work, we develop a general framework that provides security assurance against a wide class of security attacks. Our work is based on the observation that a program\´s permissible behaviorwith respect to data accesses can be characterized by certain properties. We present a hardware/software approach wherein such properties can be encoded as data attributes and enforced as security policies during program execution. These policies may be application-specific (e.g., access control for certain data structures), compiler-generated (e.g., enforcing that variables are accessed only within their scope), or universally applicable to all programs (e.g., disallowing writes to unallocated memory). We show how an embedded system architecture can support such policies by (i) enhancing the memory hierarchy to represent the attributes of each datum as security tags that are linked to it through its lifetime, and (ii) adding a configurable hardware checker that interprets the semantics of the tags and enforces the desired security policies. We evaluated the effectiveness of the proposed architecture in enforcing various security policies for several embedded benchm- arks. Our experiments in the context of the Simplescalar framework demonstrate that the proposed solution ensures run-time validation of program data properties with minimal execution time overheads.
Keywords
Access control; Costs; Data privacy; Data security; Embedded software; Embedded system; Hardware; Information security; Power system security; Runtime; data tagging; run-time checks; secure architectures;
fLanguage
English
Publisher
ieee
Conference_Titel
Hardware/Software Codesign and System Synthesis, 2005. CODES+ISSS '05. Third IEEE/ACM/IFIP International Conference on
Conference_Location
Jersey City, NJ, USA
Print_ISBN
1-59593-161-9
Type
conf
DOI
10.1145/1084834.1084884
Filename
4076335
Link To Document